Analogue and Digital Electronics Exam Questions for Electronic Engineering Students, Exams of Digital Electronics

Download Analogue and Digital Electronics Exam Questions for Electronic Engineering Students and more Exams Digital Electronics in PDF only on Docsity! Cork Institute of Technology Bachelor of Engineering (Honours) in Electronic Engineering - Stage 3 (EELXE_8_Y3) Spring 2008 Analogue and Digital Electronics (Time: 3 Hours) Instructions Answer FIVE (5) questions, at least two (2) from each section. All questions carry equal marks. Requirements: 6-decade Log/Lin Graph Paper) Examiners: Mr. P. Collins Dr. B.V. Donovan Prof. W.G. Hurley Dr. S. Foley Section A Q1. Assume that for the transistors in this question Kp = 20µA/V2, Vto = +1V for the n-channel MOSFETs, Vto = -1V for the p-channel MOSFETs, lambda = 0. a) Write expressions for the current in an N-channel MOSFET - one for the linear region of operation and one for saturated operation. Write similar expressions for a P-channel device. What terminal voltage conditions determine the operating region for both devices? [2 Marks] b) Calculate the currents flowing in M1 and M2 in Figure Q1a? [4 Marks] W=20u L=1u M1 W=10u L=1u M2 V3 2VV1 5V V2 2V Fig Q1a. 2 c) What is the voltage at node OUT in Figure Q1b? [ 4 Marks ] W=20u L=1u M1 R1 20k W=10u L=1u M2 V3 2VV1 5V V2 2V Out Fig Q1b. d) What is the voltage at node OUT in fig Q1c? [ 10 Marks ] W=20u L=1u M1 W=10u L=1u M2 V3 2VV1 5V V2 2V Out W=10u L=10u M2 Fig Q1c. 5 80uA W=10u L=1u MbreakP M11 W=20u L=1u MbreakN M6 W=20u L=1u MbreakN M7 5V W=10u L=1u MbreakP M10 2.5V 2.5V W=20u L=1u MbreakP M18 W=20u L=1u MbreakN M12 W=20u L=1u MbreakN M8 W=20u L=1u MbreakN M1 C1 0.5pF 0.5pFC20 R1 Fig Q3 6 Section B Q4. With the aid of a Block diagram and appropriate timing diagrams, write a brief description of the principles of operation of a basic Dual Slope Analogue to digital converter. [2 x 3 Marks] Comment on the effects of each of the following component imperfections on the accuracy of the conversion: a) Offset voltage in the Integrating Amplifier b) Offset voltage in the comparator c) Hysteresis in the switching point of either of the above components d) Drift in the frequency of the ‘clock’ [4 x 2 Marks] What features of this converter architecture makes it suitable for applications in ‘digital Voltmeters’? [3 Marks] At what frequency would one design the clock to run for a DVM of 0.1% accuracy (10-bit) to be used in the EU (50 Hz zone)? [3 Marks] 7 Q5. Sketch a simplified Block diagram of either a Boost or Inverting (Buck/Boost) voltage converter and give a brief description of its operation, paying particular attention to the voltage waveforms at the output side of the Inductor. [5 Marks] Referring to the simplified diagram of the Buck converter below (Fig Q5a), draw exact diagram of the (steady state) current flowing through the Inductor for a 5 Ohm load [5 Marks] At what load does this converter become discontinuous and what would be the possible consequences? [4 Marks] Estimate the efficiency of this converter, for the conditions shown, if the components have the following specifications: RDS(on) of the SW1 = 10 mΩ, R inductor = 20mΩ, Vdiode = 400 mV (1A) Ignore switching losses. Show all calculations clearly. [6 Marks] 5 Ohms R aw D C PWM Control 25V 5V + Sw 1 L = 15 uH CD F =40 kHz Fig Q 5a