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Understanding flip flops, Cheat Sheet of Electronics

This is a good summary on flip flops

Typology: Cheat Sheet

2021/2022

Available from 04/10/2023

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Download Understanding flip flops and more Cheat Sheet Electronics in PDF only on Docsity! SEQUENTIAL CIRCUITS I LATCHES & FLIP FLOPS 2 Introduction There are two types of sequential circuits: synchronous: outputs change only at specific time asynchronous: outputs change at any time Multivibrator: a class of sequential circuits. They can be: Bistable (2 stable states) Monostable or one-shot (1 stable state) Astable (no stable state) Bistable logic devices: latches and flip-flops. Latches and flip-flops differ in the method used for changing their state. Flip-Flop Vs. Latch • The flip-flop’s CLOCK input is edge sensitive, meaning the flip-flop’s output changes on the edge (rising or falling) of the CLOCK input. • The latch’s EN input is level sensitive, meaning the latch’s output changes on the level (high or low) of the EN input. 5 CS1104-11 Memory Elements 6 Memory Elements Memory element with clock. Flip-flops are memory elements that change state on clock signals. Clock is usually a square wave. command Memory element stored value Q clock Positive edges Negative edges Positive pulses Combinational Logic • Combinational Logic: • Output depends only on current input • Has no memory 2023/2/20 Sequential Circuits PJF - 7 Sequential Circuits 2023/2/20 Sequential Circuits PJF - 10 Circuits that we have learned so far Information Storing Circuits Timed “States” Sequential Logic: Concept • Sequential Logic circuits remember past inputs and past circuit state. • Outputs from the system are “fed back” as new inputs • With gate delay and wire delay • The storage elements are circuits that are capable of storing binary information: memory. 2023/2/20 Sequential Circuits PJF - 11 Synchronous Sequential Circuits: Flip flops as state memory 2023/2/20 Sequential Circuits PJF - 12  The flip-flops receive their inputs from the combinational circuit and also from a clock signal with pulses that occur at fixed intervals of time, as shown in the timing diagram. Clock Edges 15 1 0 1 0 Positive Edge Transition Negative Edge Transition • A flip-flop in digital electronics is a circuit with two stable states that can be used to store binary data. The stored data can be changed by applying varying inputs. • Flip-flops and latches are fundamental building blocks of digital electronics systems used in computers, communications, and many other types of systems. • Both are used as data storage elements. BASIC FF-SR –LATCH (NOR AND NAND LATCHES). SR FLIP FLOP The SR-flip flop is built with two AND gates and a basic NOR flip flop. The o/ps of the two AND gates remain at 0 as long as the CLK pulse is 0, irrespective of the S and R i/p values. When the CLK pulse is 1, information from the S and R inputs permits through the basic FF. When S=R=1, the clock pulse occurrence roots both the o/ps go to 0. When the CLK pulse is detached, the state of the FF is unstated. 0, 0 IS MEMORY STATE for SR NORed FF; 1,1 if memory state for NANDed FF. D – FLIP FLOP: • The simplification of the SR flip flop is nothing but D flip-flop which is shown in the figure. The input of the D-flip flop directly goes to the input S and its complement goes to the i/p R. • The D-input is sampled throughout the existence of a CLK pulse. If it is 1, then the FF is switched to the set state. If it is 0, then the FF switches to a clear state. 1, 1 STATE IS ELIMINATED
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